152 research outputs found

    Active pixel sensor array with electronic shuttering

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    An active pixel cell includes electronic shuttering capability. The cell can be shuttered to prevent additional charge accumulation. One mode transfers the current charge to a storage node that is blocked against accumulation of optical radiation. The charge is sampled from a floating node. Since the charge is stored, the node can be sampled at the beginning and the end of every cycle. Another aspect allows charge to spill out of the well whenever the charge amount gets higher than some amount, thereby providing anti blooming

    Smart focal-plane technology for micro-instruments and micro-rovers

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    It is inevitable that micro-instruments and micro-rovers for space exploration will contain one or more focal-plane arrays for imaging, spectroscopy, or navigation. In this paper, we explore the state-of-the-art in focal-plane technology for visible sensors. Also discussed is present research activity in advanced focal-plane technology with particular emphasis on the development of smart sensors. The paper concludes with a discussion of possible future directions for the advancement of the technology

    Issues and directions in IR detector readout electronics

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    An introduction to the major issues encountered in the readout of imaging detector arrays in the infrared are presented. These include circuit issues such as multiplexing, buffering, and noise, as well as materials issues. Future directions in infrared readout electronics will also be discussed. These include on-chip signal processing and advanced hybridization schemes. Finally, recent work at Columbia on 2DEG-charge coupled devices for IR detector multiplexing are described

    Architectures For Focal Plane Image Processing

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    Single substrate camera device with CMOS image sensor

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    Single substrate device is formed to have an image acquisition device and a controller. The controller on the substrate controls the system operation

    CMOS active pixel sensor type imaging system on a chip

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    A single chip camera which includes an .[.intergrated.]. .Iadd.integrated .Iaddend.image acquisition portion and control portion and which has double sampling/noise reduction capabilities thereon. Part of the .[.intergrated.]. .Iadd.integrated .Iaddend.structure reduces the noise that is picked up during imaging

    Single chip camera device having double sampling operation

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    A single chip camera device is formed on a single substrate including an image acquisition portion for control portion and the timing circuit formed on the substrate. The timing circuit also controls the photoreceptors in a double sampling mode in which are reset level is first read and then after an integration time a charged level is read

    Integrated infrared and visible image sensors

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    Semiconductor imaging devices integrating an array of visible detectors and another array of infrared detectors into a single module to simultaneously detect both the visible and infrared radiation of an input image. The visible detectors and the infrared detectors may be formed either on two separate substrates or on the same substrate by interleaving visible and infrared detectors

    CMOS active pixel sensor type imaging system on a chip

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    Single substrate device is formed to have an image acquistition device and a controller. The controller on the substrate controls the system operation

    1/fNoise Modelling and Characterization for CMOS Quanta Image Sensors

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    This work fits the measured in-pixel source-follower noise in a CMOS Quanta Image Sensor (QIS) prototype chip using physics-based 1/f noise models, rather than the widely-used fitting model for analog designers. This paper discusses the different origins of 1/f noise in QIS devices and includes correlated double sampling (CDS). The modelling results based on the Hooge mobility fluctuation, which uses one adjustable parameter, match the experimental measurements, including the variation in noise from room temperature to –70 °C. This work provides useful information for the implementation of QIS in scientific applications and suggests that even lower read noise is attainable by further cooling and may be applicable to other CMOS analog circuits and CMOS image sensors
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